feipoa
2014-06-01 08:34:01 UTC
According to this very detailed report which compared 28 socket 3 CPUs using identical hardware and averages 23 benchmark programs in DOS and Windows 98SE, the Cyrix 5x86-120 scored 83.5 overall. The AMD X5 "5x86" at 160 MHz also scores 83.5 overall. The scores were normalised to a Pentium 100 and multiplied by 100, so a Pentium 100 gets a score of 100.
http://www.vogons.org/viewtopic.php?t=28470
Now if we breakdown the scores into integer and floating-point specific benchmarks, we see that the Cyrix 5x86-120 scores 84.8 in integer while the AMD X6-160 scores 99.1. On the flip-side, the Cyrix 5x86-120 scores 75.8 in floating-point while the AMD X5-160 scores 65.5.
All Cyrix 5x86 register bits, or enhancements were enabled except for branch prediction. Here are the settings,
RSTK_EN = 1
Enables the return stack so that RET instructions will speculatively execute following a CALL.
BTB_EN = 0
Invokes the branch target buffer for instruction addresses, thereby inducing branch prediction. Works reliably with stepping 1 CPUs only.
LOOP_EN = 1
Enables the prefetch buffer loop for destination jumps still present in the prefetch buffer (prevents buffer flushing/reloading).
LSSER = 0
If set to 0, memory reads and writes to the load/store memory management unit can be reordered for optimum performance.
USE_WBAK = 1
Enables write-back L1 cache pins.
BWRT = 1
Enables the use of 16-byte burst write-back cycles.
LINBRST = 1
Enables a linear address sequence while performing burst cycles (as opposed to i486 "1+4" address sequencing).
FP_FAST = 1
Enables Fast FPU exception handling.
MEM_BYP = 1
Enables memory read bypassing so that data can be read from the write buffers prior to being written to external memory.
DTE_EN = 1
Enables the directory table entry cache.
For a detailed analysis of how much benefit each Cyrix 5x86 enhancement yields, refer to this link, http://www.vogons.org/viewtopic.php?t=30607
http://www.vogons.org/viewtopic.php?t=28470
Now if we breakdown the scores into integer and floating-point specific benchmarks, we see that the Cyrix 5x86-120 scores 84.8 in integer while the AMD X6-160 scores 99.1. On the flip-side, the Cyrix 5x86-120 scores 75.8 in floating-point while the AMD X5-160 scores 65.5.
All Cyrix 5x86 register bits, or enhancements were enabled except for branch prediction. Here are the settings,
RSTK_EN = 1
Enables the return stack so that RET instructions will speculatively execute following a CALL.
BTB_EN = 0
Invokes the branch target buffer for instruction addresses, thereby inducing branch prediction. Works reliably with stepping 1 CPUs only.
LOOP_EN = 1
Enables the prefetch buffer loop for destination jumps still present in the prefetch buffer (prevents buffer flushing/reloading).
LSSER = 0
If set to 0, memory reads and writes to the load/store memory management unit can be reordered for optimum performance.
USE_WBAK = 1
Enables write-back L1 cache pins.
BWRT = 1
Enables the use of 16-byte burst write-back cycles.
LINBRST = 1
Enables a linear address sequence while performing burst cycles (as opposed to i486 "1+4" address sequencing).
FP_FAST = 1
Enables Fast FPU exception handling.
MEM_BYP = 1
Enables memory read bypassing so that data can be read from the write buffers prior to being written to external memory.
DTE_EN = 1
Enables the directory table entry cache.
For a detailed analysis of how much benefit each Cyrix 5x86 enhancement yields, refer to this link, http://www.vogons.org/viewtopic.php?t=30607